RISC-V Doubly-Linked List

completed

A doubly-linked list implemented entirely by hand in RISC-V assembly.

Date: March 2024
Course: CSE 30321 — Computer Architecture

RISC-V
Assembly

A typical doubly-linked list, hand-coded in RISC-V assembly.

Overview

Built for Computer Architecture (CSE 30321), this project implements the core operations of a doubly-linked list — insertion, deletion, and traversal — directly in RISC-V assembly, managing pointers and memory by hand without the conveniences of a high-level language.